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    314 project vlsi design робіт знайдено, ціни вказані в USD

    Hi, I have a Flash 6 bits ADC, would like to attempt to make a 12 bits ADC, can you help me to achieve it ?

    $124 (Avg Bid)
    $124 Сер. заявка
    16 заявки

    This is pavan. I am from the VLSI industry. I need a technical writer to explain 3 subjects(digital electronics, Verilog, and VHDL).

    $121 (Avg Bid)
    $121 Сер. заявка
    17 заявки
    Shell Scripting Engineer Закінчився left

    I need to develop shell script for EDA Tool in VLSI domain

    $80 (Avg Bid)
    $80 Сер. заявка
    13 заявки
    VLSI Design Engineer - Part Time Закінчився left

    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

    $176 (Avg Bid)
    $176 Сер. заявка
    12 заявки

    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

    $149 (Avg Bid)
    $149 Сер. заявка
    4 заявки
    VLSI EDA Cadence Закінчився left

    RISC-V CPU chip high performance low power -- run EDA tools to generate GDSII synthesis and place and route

    $37 / hr (Avg Bid)
    $37 / hr Сер. заявка
    14 заявки

    Our project relates to vs1005 (All in one audio player on a chip) [увійдіть, щоб побачити URL] by [увійдіть, щоб побачити URL] in combination with the developer board. Programs are written using VLSI Solution's Integrated Development Environment VSIDE [увійдіть, щоб побачити URL] We are coding a VS1005 and want to use a stepper motor

    $130 (Avg Bid)
    $130 Сер. заявка
    3 заявки

    An existing algorithm is available, apply it and get the results. Then make minor changes in it for improvement and get the results

    $61 (Avg Bid)
    $61 Сер. заявка
    5 заявки
    SD Pro Solutions Закінчився left

    ...Engineering and Educational Project provider for Diploma, Engineering (Under Graduate, Post graduates) and Research Scholars. SD Pro was established in the year 2013 for Project Development, Course Designing, Training, and placement guidance, based at South India. SD Pro providers Training and Projects in Embedded systems, VLSI, Matlab, Power systems, Power

    $287 (Avg Bid)
    $287 Сер. заявка
    4 заявки

    Please find the document in the attachments. Solve the problems step by step with the given data/parameters and please mention all the steps clearly and specify the units for each and every step correctly and make sure the calculation is perfect. For the first question please draw the circuit diagram on a paper and attach it with the solutions and please make sure all the solutions are in WORD doc...

    $88 (Avg Bid)
    $88 Сер. заявка
    5 заявки
    VLSI Design Concept Simulations Закінчився left

    Based on my current design of CDS active pixel, I'd like to have it extended in order to make an implementation of CMOS Image Sensors of array 512x512 at least. You need to make a proof of concept and make simulations of it. We'll use Cadence Virtuoso 6.17

    $221 (Avg Bid)
    $221 Сер. заявка
    6 заявки
    Data Collection Закінчився left

    ...data. [увійдіть, щоб побачити URL] If you want to be sure and on the right page to proceed with this project, you can do a sample of 3 colleges - NIT, IIT and any local college and ping me for a check so we can ensure that you are on the right track. • Go to the website of the mentioned

    $129 (Avg Bid)
    $129 Сер. заявка
    46 заявки
    VLSI Trainer Закінчився left

    We are looking for an experienced Freelancer trainer who can train on VLSI in Bangalore. The curriculum will be provided by the company for the same.

    $768 (Avg Bid)
    $768 Сер. заявка
    11 заявки
    Help me to fix my ADC in VLSI project Закінчився left

    Hello, I have made a SAR 8 bits binairy coded ADC using method of 2 steps Successive Approximation, but it is a bit buggy. I need very experienced engineer in this field, otherwise it would just be loosing time. The simulation must be done in Cadence Virtuoso 6.x Thanks !

    $40 (Avg Bid)
    $40 Сер. заявка
    2 заявки
    6095 - Need of Xylinx Developers Закінчився left

    Design and optimization of low power VLSI circuits for Leakage power reduction using Clock Gating with GSA

    $195 (Avg Bid)
    $195 Сер. заявка
    4 заявки

    ...tracking device for a specific application. I am seeking a solution that is an android and IOS application that is designed to track and locate a sensor (IOT, GPS, RF or other VLSI) technology that is embedded within a projectile that is no larger than 1.68-inches (42.7mm) in width, height and length. The IOS and Android applications should be able to

    $318 (Avg Bid)
    Угода про нерозголошення
    $318 Сер. заявка
    20 заявки
    TCL automation VLSI Закінчився left

    I want to parse a log file and use regexp to filter some patterns and put them in output log file. I have the script. 1- put the -p and -ig inside text files and feed it to code. like this: [увійдіть, щоб побачити URL] -i [увійдіть, щоб побачити URL] -o [увійдіть, щоб побачити URL] -p [увійдіть, щоб побачити URL] -ig [увійдіть, щоб побачити URL] [увійдіть, щоб побачити URL] is: warning| info [уві...

    $108 (Avg Bid)
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    5 заявки

    Design and optimization of low power VLSI circuits for Leakage power reduction using Clock Gating with GSA

    $184 (Avg Bid)
    $184 Сер. заявка
    7 заявки

    Project description is under: [увійдіть, щоб побачити URL] Will provide a good reference as well.

    $36 (Avg Bid)
    $36 Сер. заявка
    5 заявки

    Sequential Circuit Design Look at the project description, zip files have the actual images. Also attached a reference.

    $34 (Avg Bid)
    $34 Сер. заявка
    5 заявки

    Sequential Circuit Design Look at the project description, zip files have the actual images. Also attached a reference.

    $15 - $25 / hr
    $15 - $25 / hr
    0 заявки
    VLSI coding language Закінчився left

    I need help in VLSI coding language, micro controller , C++ and C

    $423 (Avg Bid)
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    8 заявки
    $23 Сер. заявка
    4 заявки
    magic VLSi Закінчився left

    Sketch a transis...widths to achieve ratio of 1(i.e. equal rising and falling resistances) 2- Use Magic VLSI layout tool to Design your layout of the sized design then use irsim to simulate your design (all combinations of input A,B,C). The report should include the following.  Design document  Testing results  Source code and layout

    $39 (Avg Bid)
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    5 заявки
    VLSI homework Закінчився left

    everything is clear in the PDF .................................................................................................................................................................................regards

    $50 (Avg Bid)
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    1 заявки

    i need 3 to 4 papers review for the paper with brief explanation which is related to VLSI electronics

    $162 (Avg Bid)
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    2 заявки

    Build a basic building block of the Carry-Skip adder and test it for functionality in LTSpice. Description is in: [увійдіть, щоб побачити URL] Reference: [увійдіть, щоб побачити URL]

    $28 (Avg Bid)
    $28 Сер. заявка
    9 заявки

    Aim is to design a successive approximation register based analog to digital converter using cadence tool (any vlsi back end tool)

    $954 (Avg Bid)
    $954 Сер. заявка
    8 заявки
    Logo Design Закінчився left

    ... SBL TECHNOLOGIES is a proven semiconductor and embedded design house in India, with deep focus and network in Indian Defence and production agencies. Setup by an experienced team of engineers from the industry to carry-out research, design, development and manufacturing in the field of VLSI and Embedded systems. PCB services from the initial stage

    $35 (Avg Bid)
    $35 Сер. заявка
    20 заявки

    VLSI developer expertise enhanced in optimization concepts are required

    $512 (Avg Bid)
    $512 Сер. заявка
    7 заявки

    ...need a project suggestion for a masters project in VLSI testing and verification using Synopsis EDA tools for sequential circuits, because I have to submit a project proposal. Once a project suggestion seems acceptable, I will need help in finishing the project with desired outputs and compare the same with FPGA implementation. By bid for project...

    $593 (Avg Bid)
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    9 заявки
    Vlsi project Закінчився left

    I need some one has background about VLSI

    $90 (Avg Bid)
    $90 Сер. заявка
    8 заявки
    Need Help in project Закінчився left

    I need help in my company project (more details will be share with shortlisted candidate) You have to be very good in MIPS assembly language RTL, verilog, and basics VLSI technology to be shortlist you have to solve one MIPS Asm. question (attached below) as soon as possible.

    $971 (Avg Bid)
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    5 заявки

    I am going to do my research so I need useful research ideas in electronics, electrical, IT domains and those who have research ideas in VLSI , Embedded systems, Finfet technology, Drones bid me.

    $65 (Avg Bid)
    $65 Сер. заявка
    14 заявки

    Multiplier cell design with the application of 8X8 multiplier, related to VLSI design (very large scale integration). required : some report corrections in chapter 1 and 2 regarding the references and report writing. I have a attached a copy of the report and a paper specifying the corrections.

    $21 (Avg Bid)
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    6 заявки
    Suggest a topic Закінчився left

    Looking for project topics in VLSI testing and verification using Synopsis EDA tools and TETRAMAX for sequential circuits. Once a topic has been selected, I would need help in finishing the project with desired outputs. Finally, I would also need an explanation of the functioning after completing the project.

    $422 (Avg Bid)
    $422 Сер. заявка
    9 заявки
    MULTIPLIER CELL DESIGN Закінчився left

    Multiplier cell design with the application of 8X8 multiplier, related to VLSI design (very large scale integration). required : some report corrections in chapter 1 and 2 regarding the references and report writing. I have a attached a copy of the report and a paper specifying the corrections.

    $23 (Avg Bid)
    $23 Сер. заявка
    4 заявки
    Write some software Закінчився left

    I need you to develop some software for me. I would like this software to be developed for Windows using Python. floor planning of vlsi module , I have to optimise it using Patrical swarm algorithm , need gui for it It requires 1. formation of model ,i.e placement of [увійдіть, щоб побачити URL] with a big block 2. if there are 4 block within a big block then there

    $185 (Avg Bid)
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    4 заявки
    Expert in Xilinx (VHDL-BASED) Закінчився left

    An efficient Glitch power reduction using sequential clock gating in VLSI circuits

    $181 (Avg Bid)
    $181 Сер. заявка
    7 заявки
    CMOS-VLSI on Virtuoso Cadence -- 2 Закінчився left

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    $174 (Avg Bid)
    $174 Сер. заявка
    2 заявки
    CMOS-VLSI on virtuoso Cadence Закінчився left

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    $30 - $250
    $30 - $250
    0 заявки

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    $555 (Avg Bid)
    $555 Сер. заявка
    5 заявки
    VLSI technologia Закінчився left

    I need you to write a research article . About VLSI technologia

    $38 (Avg Bid)
    $38 Сер. заявка
    9 заявки

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    $181 (Avg Bid)
    $181 Сер. заявка
    5 заявки
    CMOS VLSI PROJECT Закінчився left

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    $111 (Avg Bid)
    $111 Сер. заявка
    1 заявки
    COMS VLSI PROJECT Закінчився left

    NxN array multiplier to be designed using cadence

    $30 - $250
    $30 - $250
    0 заявки
    Vlsi desiging and testability Закінчився left

    A structural methodolgy for scan based design cells with efficient power dissipation methods

    $30 - $250
    $30 - $250
    0 заявки
    vlsi project Закінчився left

    the tool required to be used is l-edit software

    $221 (Avg Bid)
    $221 Сер. заявка
    4 заявки
    DMDG mosfet Закінчився left

    In this project numerically simulated Dual material Double gate MOSFETs structure through ATLAS device simulator. Analysis and comparative study of the electrical characteristics of DMDG MOSFETs with that of conventional SOI MOSFETs has been done. DMDG MOSFETs has become a important part of VLSI research. An analytical model is developed using ATLAS

    $9 - $23
    $9 - $23
    0 заявки