Verilog / VHDL Роботи та конкурси

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers.
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Проект/Конкурс Описання Заявки/Роботи Навички Розпочато Закінчується Ціна (USD)
Dual axis sun tracking system using myRIO I need someone who could develop the program on labview using myrio to track sun and move the panels accordingly. I am using servo motors. 10 Verilog / VHDL, Мікроконтролер, Електротехніка, Вбудоване ПЗ, LabVIEW Oct 22, 2017 Сьогодні6д. 7г. $143
Digital system and microprocessor small task -- 2 small task on digital system and microprocessor using verilog amount usd 20 time 1 day 8 Електроніка, Verilog / VHDL, Мікроконтролер, Електротехніка, FPGA Oct 22, 2017 Oct 22, 20175д. 23г. $32
Electrical engineering expert needed to do vhdl code Electrical engineering expert needed to do vhdl code $30 pay 9 Техніка, Електроніка, Verilog / VHDL, Електротехніка, Написання академічних текстів Oct 22, 2017 Oct 22, 20175д. 22г. $55
Custom Verilog design We need to build a custom Verilog design. Please message for further details. 12 Техніка, Verilog / VHDL, Електротехніка, LabVIEW, FPGA Oct 21, 2017 Oct 21, 20175д. 9г. $24
project verilog Hi Ahmed M., I noticed your profile and would like to offer you my project. We can discuss any details over chat. 10 Програмування на С, Техніка, Verilog / VHDL, Електротехніка, FPGA Oct 21, 2017 Oct 21, 20174д. 23г. $12
VLSI design and testability using SPICE/ Verilog/VHDL An applied project may involve using tools such as Spice, Verilog/VHDL, etc. to demonstrate its success 10 Verilog / VHDL, Very-large-scale integration (VLSI) Oct 20, 2017 Oct 20, 20174д. 13г. $466
Logisim Software Tasks Hi I need someone who is good with Logisim Software to complete some tasks. 9 Техніка, Електроніка, Verilog / VHDL, Електротехніка Oct 20, 2017 Oct 20, 20174д. 8г. $26
Power Generation Simulation using LabVIEW Power Generation Simulation using LabVIEW. Power generation stations will often consist of a number of individual generators where each generates a proportion of the overall station’s output. Need two separate applications. Application 1 and Application 2. 8 Matlab and Mathematica, Verilog / VHDL, Електротехніка, LabVIEW, Arduino Oct 20, 2017 Oct 20, 20174д. $54
Digital design using Verilog Use Basys 3 Board and Vivado 2016.2 I'll share the rest details 7 Verilog / VHDL, Мікроконтролер, Електротехніка, LabVIEW, FPGA Oct 20, 2017 Oct 20, 20173д. 23г. $42
VHDL Radio Clock + python script Need help in VHDL everything is mentioned on the PDF 6 Електроніка, Verilog / VHDL, Тестування ПЗ, Електротехніка, FPGA Oct 19, 2017 Oct 19, 20173д. 2г. $46
Project for Gabriel G. I need help with capsim practice rounds 4 Управління проектом, Телемаркетинг, Excel, Matlab and Mathematica, Verilog / VHDL Oct 18, 2017 Oct 18, 20172д. 15г. $25
verilog project making verilog on quartus II (cyclone IV) 11 Техніка, Verilog / VHDL, Архітектура ПЗ, Асемблювання, FPGA Oct 18, 2017 Oct 18, 20172д. 10г. $145
Cloudsim project I want someone to work on programming part in cloudsim that includes migration, Placement, scheduling and power consumption. 2 Програмування на С, Java, Verilog / VHDL, Архітектура ПЗ, Програмування на C++ Oct 18, 2017 Oct 18, 20171д. 23г. $61
Verilog programming - 18/10/2017 00:34 EDT Simple verilog programming project. Create an ALU with full [url видалений, увійдіть для перегляду] is desired is a Verilog system that can operate as a calculator with a set of logic gates attached. Other details provided later. 14 Verilog / VHDL Oct 18, 2017 Oct 18, 20171д. 22г. $100
Verification Of Motion Estimator Using UVM Verification Of Motion Estimator Using UVM(Universal Verification Methodology) 5 Verilog / VHDL, Електротехніка, Very-large-scale integration (VLSI) Oct 17, 2017 Oct 17, 20171д. 21г. $238
Verilog programming Simple verilog programming project. Create an ALU with full [url видалений, увійдіть для перегляду] is desired is a Verilog system that can operate as a calculator with a set of logic gates attached. Other details provided later. 5 Verilog / VHDL Oct 17, 2017 Oct 17, 20171д. 18г. $89
ASIC Design in Verilog This project is related to Computational Neural Networks 3 Matlab and Mathematica, Verilog / VHDL, Neural Networks Oct 17, 2017 Oct 17, 20171д. 13г. $187
VHDL Radio clock everything is going to be explained on the pdf 11 Електроніка, Verilog / VHDL, Мікроконтролер, Електротехніка, FPGA Oct 17, 2017 Oct 17, 20171д. 12г. $40
Design of audio visualiser using DE2-115 Altera board I want to implement an audio visualizer on the screen of the voice spoken through the mic or played using SD card. 4 Verilog / VHDL Oct 17, 2017 Oct 17, 20171д. 10г. $234
Matlab power system Simulation using Simulink -- 2 - 17/10/2017 07:15 EDT My project is about the microgrid protection. I need to simulate a simple power network system (Figure 6 in the attachment) using Simulink, For the inverter I need to make some controller that can control when the microgrid is in grid mode or islanded mode (Figure 3-5 in the attachment). It is best if I can get the result same or similar with the one that in the journa 14 Техніка, Електроніка, Matlab and Mathematica, Verilog / VHDL, Електротехніка Oct 17, 2017 Oct 17, 20171д. 4г. $136
Matlab power system Simulation using Simulink My project is about the microgrid protection. I need to simulate a simple power network system (Figure 6 in the attachment) using Simulink, For the inverter I need to make some controller that can control when the microgrid is in grid mode or islanded mode (Figure 3-5 in the attachment). It is best if I can get the result same or similar with the one that in the journa 9 Техніка, Електроніка, Matlab and Mathematica, Verilog / VHDL, Електротехніка Oct 17, 2017 Oct 17, 20171д. 3г. $157
Електроніка, Verilog / VHDL, Мікроконтролер, Електротехніка, LabVIEW Oct 16, 2017 Oct 16, 201721г. 20х.
netlist construction in EE using C++ refactor the sample code by using the c++ 8 Програмування на С, Verilog / VHDL, Програмування на C#, Електротехніка, Програмування на C++ Oct 16, 2017 Oct 16, 20179г. 55х. $129
verilog project want verilog code on fpga i want soon 2 Техніка, Verilog / VHDL, Архітектура ПЗ, LabVIEW, FPGA Oct 16, 2017 Oct 16, 20178г. 32х. $8
ASIC Designs and Development Hello. I am into a project that involves creating PCB / ASIC design with FPGA/CLPD. The specified ASIC Architecture as a product needs to be able calculate one or more algorithms connected through some type of data socket. Performance and power is important. I am interrested to get in touch with a board designer and vhdl developer that have knowledge both with electrical layouts and vhdl. ... 8 Техніка, Електроніка, Verilog / VHDL, Електротехніка, Розводка друкованої плати Oct 16, 2017 Oct 16, 20172г. 23х. $16
veriloghdl code for calculation area THis must implement on quartus( altera FPGA cyclone IV) 3 Програмування на С, Verilog / VHDL, Мікроконтролер, Програмування на C++, FPGA Oct 16, 2017 Oct 16, 20171г. 34х. $128
making verlog hdl code calculataion area in black and white image on fpga ( cyclone IV) 9 Програмування на С, Verilog / VHDL, Мікроконтролер, Електротехніка, Програмування на C++ Oct 16, 2017 Oct 16, 2017Закінчився $124
VHDL Coursework help in VHDL codes ,, everything will be explained later 14 Техніка, Електроніка, Verilog / VHDL, Електротехніка Oct 15, 2017 Oct 15, 2017Закінчився $57
fpga software I want to read programmes in FPGA chips 17 Програмування на С, Verilog / VHDL, Архітектура ПЗ, FPGA Oct 15, 2017 Oct 15, 2017Закінчився $413
creation of hardware module using verilog which will be able to communicate with the memory of the processor using Verilog which will be able to communicate with the memory of the processor 4 Verilog / VHDL Oct 14, 2017 Oct 14, 2017Закінчився $62
simple verilog hdl code calculate each area in black and white image 11 Програмування на С, Техніка, Verilog / VHDL, Мікроконтролер, FPGA Oct 13, 2017 Oct 13, 2017Закінчився $47
Simple Verilog Project Design a perception timer that measures the time for a user to respond to a request to complete a simple task. I'll send the rest details for part 3. 8 Техніка, Matlab and Mathematica, Verilog / VHDL, Електротехніка, FPGA Oct 13, 2017 Oct 13, 2017Закінчився $24
Color space conversions and FPGA's 3 pages report in two parts on: (i) fundamental information about FPGAs and their programming, and (ii) standard color spaces and formulas for converting those color spaces into other ones. (Plagarism free) finished in 3 days maximum. 9 Техніка, Verilog / VHDL, Електротехніка, FPGA Oct 13, 2017 Oct 13, 2017Закінчився $66
Build software Looking for expert in FPGA and verilog 18 Програмування на С, Verilog / VHDL, Архітектура ПЗ, Програмування на C++, FPGA Oct 12, 2017 Oct 12, 2017Закінчився $480
Statcom in simulink Power electronics expert -- 2 Statcom in simulink Power electronics expert needed 9 Електроніка, Matlab and Mathematica, Verilog / VHDL, Електротехніка, FPGA Oct 11, 2017 Oct 11, 2017Закінчився $164
Want to develop robotic program and test the same with simulation to check feasibility of and automation idea Existing : Manual labours are lifting filled 25 kg bags from stack of machine palletised load (40 bags per wooden pallet, and loading into trucks, containers. Automation solution : Using three axis gantry robot, vacuum lifting end tool and smart programming to create fully automatic truck loading system. All above only on simulation, 3d models to check feasibility of solutions and then to us... 5 Matlab and Mathematica, Verilog / VHDL, Архітектура ПЗ, Розробка ПЗ, Програмування Oct 11, 2017 Oct 11, 2017Закінчився $4680
VLSI PROJECTS FIND THE ATTACHED IEEE [url видалений, увійдіть для перегляду] REQUIREMENTS 4 Verilog / VHDL, FPGA, Very-large-scale integration (VLSI) Oct 11, 2017 Oct 11, 2017Закінчився $86
Statcom in simulink Power electronics expert Statcom in simulink Power electronics expert needed 9 Електроніка, Matlab and Mathematica, Verilog / VHDL, FPGA Oct 11, 2017 Oct 11, 2017Закінчився $114
Convert a code from Aptech Gauss language into Matlab with Parallel processing. I have a code written in Aptech Gauss program that I want to convert into Matlab and I want the code to run under CUDA power in Matlab. 3 Matlab and Mathematica, Verilog / VHDL, Архітектура ПЗ, CUDA, Розробка ПЗ Oct 10, 2017 Oct 10, 2017Закінчився $153
Prelab Write VHDL code 7 Verilog / VHDL Oct 10, 2017 Oct 10, 2017Закінчився $27
Altera DE115 - Audio signal processing Record voice , Add and Remove Noise and play back recording. Design and implement the verilog code on an Altera DE2-115 Development Board. Available Hardware Microphones, Speakers 9 Verilog / VHDL, Мікроконтролер, Вбудоване ПЗ, Асемблювання, FPGA Oct 10, 2017 Oct 10, 2017Закінчився $226
Audio Signal Processing AIM - Record Audio , Add and Remove Noise and play back audio. To design and implement the Embedded System centred on an Altera DE2-115 Development Board. The project should be based on a Verilog HDL implementation. Available Hardware In addition to the DE2-115 board, the following hardware devices are available. If you wish to do a project requiring hardware support but don’t see the... 7 Verilog / VHDL, Мікроконтролер, Електротехніка, Вбудоване ПЗ, FPGA Oct 10, 2017 Oct 10, 2017Закінчився $509
Sequence Diagram There is a service class called PurchaseOrder that is called when a customer makes a purchase. It has a public method purchase(Account, Order). It does the following. a. Call [url видалений, увійдіть для перегляду] () b. Call [url видалений, увійдіть для перегляду] (Account) c. Call [url видалений, увійдіть для перегляду] () d. [url видалений, увійдіть для перегляду] () calls [url видалений, у... 6 Verilog / VHDL, Архітектура ПЗ, PLC & SCADA, Метод скінчених елементів, Технічне креслення Oct 10, 2017 Oct 10, 2017Закінчився $37
Matlab Program for Harmonics Analysis for a sampled data (Data in excel format) Need a Matlab program to perform Harmonics Analysis for a sampled data (data in Excel format). Matlab Codes must structured to read data from Excel file. Please find the attached Excel file [url видалений, увійдіть для перегляду] 22 Excel, Matlab and Mathematica, Verilog / VHDL, Архітектура ПЗ, Розробка ПЗ Oct 7, 2017 Oct 7, 2017Закінчився $22
UML/MARTE modeling I want to build an interface(which consists of rules) to transform any MML model to a UML-MARTE model using AGG(algebraic graph transformation). 1 Verilog / VHDL, Проектування з UML, Метод скінчених елементів, SAS, CATIA Oct 7, 2017 Oct 7, 2017Закінчився $587
matlab report making 10 pages minimum hi discussion via chat no front milestone need it in 12 hrs 10 mages maximum paper should be in IEEE formats no plagiarism is there.. please give a good quote 10 Matlab and Mathematica, Verilog / VHDL, LaTeX, Математика, Фізика Oct 7, 2017 Oct 7, 2017Закінчився $48
Matlab Write a Function for Forward Kinematics of the RPR Robot Input Format are the joint angles in radian, as shown in the figure is the extension of the prismatic joint in inches, as shown in the figure Output Format R is a 3x3 rotation matrix representing (Note: where represents a point in frame x) pos is a 4x3 matrix where each row contains the x,y,z coordinates represented as [x y z] in matrix form. Each row is the x,y,z coordinates of a point... 16 Matlab and Mathematica, Verilog / VHDL, Архітектура ПЗ, Метод скінчених елементів, Розробка ПЗ Oct 7, 2017 Oct 7, 2017Закінчився $38
String compare algorithm need an algorithm that would compare two long strings delimited by | 3 Matlab and Mathematica, Verilog / VHDL, Алгоритм, CUDA, Машинне навчання Oct 7, 2017 Oct 7, 2017Закінчився $1960
Cryptoanalysis - Cryptograpgy - C programming I am looking for someone to write me a code in c that will test the cryptographic strength of the passwords. I can share more specific instructions and dummy passwords. I need a simple program. 9 Програмування на С, Verilog / VHDL, Архітектура ПЗ, Пролог, Програмування на C++ Oct 6, 2017 Oct 6, 2017Закінчився $69
MSF and DCF receiver everything will me explained later 5 Техніка, Електроніка, Verilog / VHDL, Електротехніка, Бінарний аналіз Oct 6, 2017 Oct 6, 2017Закінчився $46
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