Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Найняти Verilog / VHDL Designers

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    39 робіт знайдено, ціни вказані в USD
    $55 Сер. заявка
    1 заявки
    FPGA Design Project 6 дні(-в) left
    ПІДТВЕРДЖЕНО

    Please see attached pdf file to get complete details related to this task. This required template has been added in zip file.....

    $88 (Avg Bid)
    $88 Сер. заявка
    6 заявки
    $3 / hr Сер. заявка
    5 заявки
    MIPS Expert needed for small design 6 дні(-в) left
    ПІДТВЕРДЖЕНО

    MIPS Controller Design a FSM controller for MIPS processor with more than six RISC instructions. Submit your report with the following: FSM Control signals for each state Control signals to Boolean equations State equations Programmable Logic Array diagram representing control signal outputs using inputs

    $20 - $166
    $20 - $166
    0 заявки

    Looking for Linux Kernel developers And FPGA developers to port the Mister Project Linux Kernel and U-Boot of DE10 Nano to the Xilinix Ultra96-V2 Zynq UltraScale+ ZU3EG. Once completed we need assistance porting of the existing FPGA cores of Mister Project to the zu3. Mister Project Linux Kernel: [увійдіть, щоб побачити URL] Mister Project U-Boot: [увійдіть, щоб побачити URL] [увійдіть, щоб п...

    $575 (Avg Bid)
    $575 Сер. заявка
    4 заявки
    Need A VHDL expert for a small theory task 6 дні(-в) left
    ПІДТВЕРДЖЕНО

    You have a VHDL code and you need to describe it. I would provide example

    $19 (Avg Bid)
    $19 Сер. заявка
    6 заявки

    I need the help of someone who could help me propose and implement an algorithm using constraints programming methods that supports formal verification of digital models that can be used on hardware models in VHDL , verilog, e.t.c, its quite urgent please, your help would be highly appreciated

    $131 (Avg Bid)
    $131 Сер. заявка
    7 заявки
    Vlsi sempile ptoject 5 дні(-в) left
    ПІДТВЕРДЖЕНО

    I want 3bit cuonter is tow phases .phase 1 is Dane but I want phase 2 is layout in magic

    $18 (Avg Bid)
    $18 Сер. заявка
    4 заявки

    We need someone to help with some theoretic & programming questions in MPI Parallel C programming, including cost analysis, running time of the program, etc.

    $31 (Avg Bid)
    $31 Сер. заявка
    1 заявки
    Time-to-digital converters 5 дні(-в) left

    Time-to-digital converters based on FPGAs.

    $35 / hr (Avg Bid)
    $35 / hr Сер. заявка
    8 заявки

    Hi, this project will require you to use verilog and basys3 board and logic analyzer to do the work. Contact me if you are an expert in this.

    $56 (Avg Bid)
    $56 Сер. заявка
    4 заявки

    The booth multiplier circuit is from a research paper. I will give you the research paper.

    $20 (Avg Bid)
    $20 Сер. заявка
    5 заявки
    Scilab Software 3 дні(-в) left
    ПІДТВЕРДЖЕНО

    I want someone who has knowledge in Scilab and can write in some codes

    $180 (Avg Bid)
    $180 Сер. заявка
    8 заявки
    design and verification 3 дні(-в) left
    ПІДТВЕРДЖЕНО

    design of an FPGA device and its verification

    $101 (Avg Bid)
    $101 Сер. заявка
    13 заявки

    I'm required to design this architecture using VHDL. This architecture also consists of hops.

    $122 (Avg Bid)
    $122 Сер. заявка
    7 заявки

    It is an easy project message me for details

    $143 (Avg Bid)
    $143 Сер. заявка
    8 заявки
    Robotic Expert 2 дні(-в) left
    ПІДТВЕРДЖЕНО

    Hello freelancers, I am looking for an expert in VHDL/FPGA for an interesting project. The project is very small and I encourage new freelancers to place the bid. My budget is 30-40 AUD

    $52 (Avg Bid)
    $52 Сер. заявка
    3 заявки
    VHDL Expertss 2 дні(-в) left
    ПІДТВЕРДЖЕНО

    Hello freelancers, I am looking for an expert in VHDL for an interesting project. The project is very small and I encourage new freelancers to place the bid. My budget is 30-40 AUD

    $43 (Avg Bid)
    $43 Сер. заявка
    6 заявки
    $500 Сер. заявка
    5 заявки
    verilog, vhdl expert needed -- 3 2 дні(-в) left
    ПІДТВЕРДЖЕНО

    i want long term employee. i need to draw internal block diagram. if you are expert, please bid here

    $3 / hr (Avg Bid)
    $3 / hr Сер. заявка
    7 заявки
    verilog, vhdl expert needed -- 2 1 день left
    ПІДТВЕРДЖЕНО

    i want long term employee. i need to draw internal block diagram. if you are expert, please bid here

    $2 / hr (Avg Bid)
    $2 / hr Сер. заявка
    6 заявки
    verilog, vhdl expert needed 1 день left
    ПІДТВЕРДЖЕНО

    i want long term employee. i need to draw internal block diagram. if you are expert, please bid here

    $40 (Avg Bid)
    $40 Сер. заявка
    2 заявки

    - Develop a micro-threaded RISC-V for low-overhead threading - Integrate with FPGA HLS tool to make a solution of micro-threaded HLS - Need to optimized PPA (Power Performance Area) - Require good problem solving skill - Require good written and oral communication kill

    $7714 (Avg Bid)
    $7714 Сер. заявка
    2 заявки
    simulate CPU scheduling with java.. 1 день left
    ПІДТВЕРДЖЕНО

    In this project you will simulate Round Robin scheduling algorithm. For the sake of simulation, consider a simple system with a single CPU, single I/O device. The CPU has a ready queue and an I/O queue. The system will select a process from the ready queue based on RR algorithm (quantum time will be given to you) and send it to CPU. Information about a process is maintained in process control bloc...

    $27 (Avg Bid)
    $27 Сер. заявка
    7 заявки
    $22 Сер. заявка
    3 заявки

    Help I am currently stucked in the design and simulation part. Title is "Design of Sliding Mode Control in Active Suspension System". Using a quarter car model to simulate road disturbances and viewing the results from the controller compared to a passive system. Complete in 1day (Start now and give progress in every hour) Software used is MATLAB and Simulink. - What I need is only 1 ...

    $150 (Avg Bid)
    $150 Сер. заявка
    6 заявки
    Robotic Expert (VHDL) 21 годин(-и) left
    ПІДТВЕРДЖЕНО

    Hello freelancers, I am looking for an expert in VHDL for an interesting project.

    $171 (Avg Bid)
    $171 Сер. заявка
    6 заявки

    Help I am currently stucked in the design and simulation part. Title is "Design of Sliding Mode Control in Active Suspension System". Using a quarter car model to simulate road disturbances and viewing the results from the controller compared to a passive system. Complete in 1day (Start now and give progress in every hour) Software used is MATLAB and Simulink. - What I need is only 1 ...

    $163 (Avg Bid)
    $163 Сер. заявка
    6 заявки
    Need help on PNR projects on innovus tool 5 годин(-и) left
    ПІДТВЕРДЖЕНО

    I need physical design engineer who can guide me end to end for place and route projects for 7 NM on innovus so that I an perform well in interview

    $8 - $20
    $8 - $20
    0 заявки
    Looking for parallel programming expert -- 4 2 годин(-и) left
    ПІДТВЕРДЖЕНО

    Looking for parallel programming expert

    $146 (Avg Bid)
    $146 Сер. заявка
    2 заявки
    Looking for parallel programming expert -- 3 2 годин(-и) left
    ПІДТВЕРДЖЕНО

    Looking for parallel programming expert

    $136 (Avg Bid)
    $136 Сер. заявка
    2 заявки
    Project in Very large-scale integration 1 година left
    ПІДТВЕРДЖЕНО

    i need someone know how to implement the verlog and has experience in vlsi and the circuit

    $156 (Avg Bid)
    $156 Сер. заявка
    8 заявки
    Looking for Embedded And fpga expert -- 2 Закінчується left
    ПІДТВЕРДЖЕНО

    This project has multiple phase that need to be done. It is yo develop a system that demonstrate the error correction H(7,4) hamming codes Use of python, Verilog and arudino is also required

    $68 (Avg Bid)
    $68 Сер. заявка
    1 заявки
    CME HFT FPGA tick to trade -- 2 Закінчився left

    I'm a trader and I need an HPGA engineer foran ultra low latency fpga solution to trade on CME. I have a c++ reference implementation for most blocks, obviously this needs to be converted to hdL (verilog ideally). Functional requirements: - Msrket Data feed handler - Order book building (Last bid, ask, trade) - Line arbitration (Feed A and B arbitration) - orders sending - Exchange orders re...

    $10000 (Avg Bid)
    $10000 Сер. заявка
    2 заявки
    Vhdl project -- 3 Закінчився left
    ПІДТВЕРДЖЕНО

    Fpro microblaze.

    $18 (Avg Bid)
    $18 Сер. заявка
    6 заявки
    ASIC Verification Engineers 51 дні(-в) left
    ПІДТВЕРДЖЕНО

    Seeking full-time experienced ASIC Verification Engineers for an ongoing project (12 months+) Essential requirements: Knowledge of at least one industry standard protocol like Ethernet, PCIe, MIPI, USB, AMBA or similar. Ability to update testbench components like reference model/SB, drivers and monitors. Team player with excellent interaction skills. Perl/shell scripting is a good to have. ...

    $15 - $24 / hr
    Прихований Угода про нерозголошення
    $15 - $24 / hr
    20 заявки