Design a simple CPU using Verilog

$30-250 SGD

Закрито

Опублікований

over 10 years ago

$30-250 SGD

Оплачується при отриманні

This is a school assignment that requires us to design a simple 5-stage pipeline CPU. It should be able to detect data hazard and insert bubbles into the pipeline accordingly. This is the description of the assignment: [login to view URL]

Electronics

Verilog / VHDL

ID проекту: 5115568

Про проект

10 пропозицій(-ї)

Дистанційний проект

Активність 10 yrs ago

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10 фрілансерів(-и) готові виконати цю роботу у середньому за $284 SGD

@ahmedmohamed85

Dear sir, I have more than 5 years experience in digital design using verilog I have already worked in similar project before please read the reviews written on me for similar CPU design project

$244 SGD за 7 дні(-в)

4,9

(493 відгуки(-ів))

8,2

@farazahmad759

Dear Hiring Manager, I have already built similar processor (CPU) during my BS engineering. I can help you do this. You can have a look at my profile to see how beautifully I have done all my projects, and read reviews my clients have posted. I provide free 15-days support to my clients so that they verify the design and enjoy the real work (if they are students I provide this support so that they can prepare their viva etc. and get excellent grades). So, I guarantee you will be 110% satisfied with my work and become permanently my client. The price is negotiable so feel free to contact me. Regards Faraz Ahmad

$1 000 SGD за 50 дні(-в)

4,9

(28 відгуки(-ів))

5,4

@eicr2013

Hi I am an electronic undergraduate. I am very good at verilog. I recently developed 8051 microcontroller using verilog. I can help you.

$277 SGD за 8 дні(-в)

5,0

(6 відгуки(-ів))

4,3

@amibio

Hi, Verilog HDL expert here with 15+ years experience (since early 1998). 36 yo, really old in this field and experienced ^_^ Have designed more than 20 CPUs and overall 125+ custom designs including FFT, DCT, motion estimation, motion compensation, MSF receiver, DCF77 receiver, bus encoders, multiple ASIPs/CPUs incl. the research ByoRISC processor. Guaranteed quality of work and delivery within one work week (7 calendar days).

$244 SGD за 7 дні(-в)

5,0

(2 відгуки(-ів))

4,0

@pmullappilly

Hi, I am a graduate in EEE.I have 15 years of experience in programming,electronic design and teaching.I can do this work for you. Thanks and Regards, Prasad.M

$155 SGD за 10 дні(-в)

5,0

(7 відгуки(-ів))

3,7

@vivekgajera

I can do your project.i have two year plus experience of this field....................................................

$230 SGD за 3 дні(-в)

5,0

(5 відгуки(-ів))

2,9

@saqawyasir

Hi , I can deliver the project to you on well in time. Have already done this and have got the files almost ready. Just need to check them again for you. I have quite well experience in computer architecture with industrial experience in leading processor vendors Hope to hear from you soon.

$135 SGD за 3 дні(-в)