Build on the VHDL and Verilog logical structures . Both combinational logic and synchronous system design is included. NO required to synthesize the design but, should ensure that all your non-testbench code is synthesizable. Functional (i.e. behavioural) simulation of your test benches must be used to
verify your designs.
The developing & simulating should using the Xilinx ISE suite of tools.
Some of these methodsare required to implement some of these functions into a flexible 16-bit cryptographic co-processor:
• Substitution.
• Permutation.
• Key Addition.
• Addition over a finite field.
• Multiplication over finite field.
The structure of the project is as follows:
Section 1: Designing of the combinational components which are utilised in our crypto-processor.
Section 2 :Synchronous designs, as well as the components needed to ensure the data processed by our
combinational logic can be stored.
Finally , a test program is given to ensure the final synchronous design works as expected.
Let's discuss the fee you want. I will do it for you soonest and cheapest. I have had 2 years experiencing on FPGA design using Verilog and VHDL. Now I'm working with VHDL and Verilog everyday. That's why I'm the ideal freelancer for you. Please contact me to discuss more about our deal.
$66 USD за 1 день
4,8 (3 відгуки(-ів))
2,1
2,1
2 фрілансерів(-и) готові виконати цю роботу у середньому за $71 USD