Design Serdes (Serializer De-seralizer) on Altera MAX10

Виконано Опубліковано %project.relative_time Оплачується при отриманні
Виконано Оплачується при отриманні

Specification:

The serdes circuit should take 16 16-bit data from one memory and transfer it to another memory serially.

The design will have 2 parts.

Following should be the functionality:

Part 1

Data from a preset memory (16 locations of 8-bits each) is converted to a serial stream of data and sent out of the FPGA chip through a single pin...

Part 2

...The serial transmission from part 1 is captured and converted to parallel data before being stored in another memory location( as 16 locations of 8-bits).

The data in this memory should match with the data in memory in Part 1.

Both parts are to be implemented in the same FPGA ....The serial out from part 1 will be physically connected with a wire to the serial input in part 2 (in a loopback configuration)

This circuit should display the contents of memory in part 2 on seven segment displays.( two seven segment)

A pushbutton should be used to single step through all the memory locations...remember the contents displayed should match what was preset in the memory in part 1

Verilog / VHDL

ID Проекту: #12090353

Про проект

7 заявок(-ки) Дистанційний проект Остання активність 7 роки(ів) тому

Доручено:

yemelitc

Hello, I can do your project in the Verilog HDL within a few days. I mainly need to know the protocol with which memory data is to be loaded and stored. Is it Block-RAM (embedded RAM)? In which case that will be simple Більше

$60 CAD за 5 дні(-в)
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7 фрілансерів(-и) готові виконати цю роботу у середньому за $118

zarnescugeorge

Hello! How are you?! Please look at my profile and send me a message! I can help you right away! I am here! Have a great day!

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rohi1710rohi1710

Hi, -FPGA design engineer since last 7 years -Expertise in verilog/VHDL Please find below details of the projects TSMAC Hardware acceleration(3months) The project is to develop hardware acceleration block for TS Більше

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kulwantsingh16

A proposal has not yet been provided

$100 CAD за 5 дні(-в)
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