1.0 year of experience in Analog layout design
3.0 years of experience in FPGA and Embedded System
Familiar with device driver development with many interfaces (I2C, UART, SPI,
AXI protocol), extensive knowledge about FIFO, Xilinx IP, SDRAM, DDR3,
DDR4, Ethernet protocol
Experienced in system integration, timing constraints resolution & timing
analysis
Familiar with Verilog HDL, VHDL, SystemVerilog, C, TCL, Perl
Experienced in using EDA tools including: Modelsim, Quartus, Xilinx Vivado, ISE,
XPS, SDK, LEDA, VCS, Design Compiler, Prime Time, IC Compiler