Зображення профілю raulbehl
@raulbehl
Прапор India Jammu, India
На сайті з 22 лютого 2015 р.
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raulbehl

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I am currently working as a Design and Verification engineer at a leading Processor Development firm. My skills set include: i) Matlab/LabView/Logisim ii) Engineering Mathematics iii) Assembly (ARM, MIPS, PLP, x86, MARIE and pep/8) / Computer Architecture iv) Verilog/System Verilog/UVM v) Raspberry Pi/Arduino/TMS320C5535 eZdsp/TM4C123 vi) PSpice vii) C/C++, Qt, Python viii) Perl Happy to help! :-)
$25 USD/год.
106 відгук(-и,-ів)
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Нові відгуки

  • зображення ashokreddyedara Project for Rahul B. €45.00 EUR

    “very nice to work him and a quality work”

  • зображення richieloren armsim integer sort $27.50 USD

    “I did not hear from him for several days so I canceled the project I awarded to him.”

  • зображення jpatel1229 Project for Rahul B. $500.00 USD

    “It was great working with him. Great work, great knowledge, good efficiency and good communication.”

  • зображення ITEmporium help required for assembly language $50.00 USD

    “Very Well Done ... Highly Recommended to all”

  • зображення ashokreddyedara CAO (computer architecture n organisation) based €25.00 EUR

    “i would recommend very nice n best work and in time”

  • зображення sunnyzee05 Create a MIPS simulator $27.50 USD

    “Nothing to say”

Досвід

Open Source Hardware Developer

Nov 2016

SimpleCPU is a CPU design and verification platform with a bunch of design and verification tools under its hood. SimpleCPU is aimed towards students and researchers, helping them learn and easily carry out CPU simulations in an intuitive way. Developed a Verilog based MIPS CPU (covering both pipelined and non-pipelined ones) Developed C model for MIPS architecture and developed the SimpleCPU's very own co-simulation environment for functional testing Currently, working on RISC-V based CPUs

Open Source Developer

Oct 2015 - Mar 2016 (5 months)

Volunteer for the open source project Mixxx, a free DJ application for Windows, Mac, and Linux. Initially became familiar with codebase and QT and fixed few wishlists bugs.

Intern

Jul 2015 - Dec 2015 (5 months)

• Understand the basic work flow of the Memory Sub-system team and implement functional coverage model for external memory controller • Ported the random and directed tests to next product versions • Used SystemVerilog functional coverage extensions for specifying the coverage model • Found few corner cases in the testbench by analysing the coverage bins

Освіта

B.E. Hons Electronics and Instrumentation

2011 - 2015 (4 years)

Кваліфікація

edX Verified Certificate for Embedded Systems - Shape the World (2016)

edX UT.6.02x

Successfully completed and received a passing grade in UT.6.03x: Embedded Systems - Shape the World a course of study offered by UTAustinX, an online learning initiative of University of Texas System through edX.

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