Digital clock and a stopwacth on Spartan 3E

I have had more than 3 years experiences on FPGA Design using Verilog and VHDL: - FPGA's Xilinx and Altera. - MicroBlaze, Embedded system design on FPGA of Xilinx. - FPGA, VLSI Implementation of DSP System( Matlab or C, C++, algorithm). - Digital logic design. - Some previous projects: + Matlab and FPGA Implementation of a License Plate Recognition System on FPGA Spartan-6 of Xilinx. + FPGA Implementation of a Fall Detection System on Virtex-5 Xilinx FPGA. + FPGA Implementation of a Fingerprint Identification System on Virtex-5 Xilinx FPGA. + VLSI Implementation of image/video compression in wavelet domain using DWT and SPIHT algorithm + Penalty football game on VGA DE2-70, DE2 Altera + AES 128, 256, 192. + MIPS Single-cycle, Pipeline processor.

Hello! How are you! I can help you right away! I have 10 years experience with vhdl and fpgas! I teach the topics you need at a big university in europe! Please send me a message to talk more about your circuit! Have a nice day!

Hi I am having 10+ years of experience with same , please let me know how to take this further. I am commited to provide you best service , there is no copy/paste from me. Thanks SK

We are professionals in VHDL,Verilog and FPGA,I possess the Spartan 3 E stater Board with cyclone 2 FPGA.

Hi We have the coding available for your requirement working in spartan 3e kit. We will be delivering the code once the project is awarded. -- Thanks and Regards ASR

Over 12 years of experience in electronics hardware and software design. Proficient in software and hardware design of embedded systems. Successful in planning and management of entire development and production cycle. Programming languages: C, C++, Ada, Pascal, MATLAB, GPSS, VHDL Processor architectures: 8051, AVR, ARM-M3, ARM-R4, ARM-7, x86, PicoBlaze, PSoC, PIC FPGA and CPLD architectures: Cyclone, MAX, Spartan, CoolRunner

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Hello. My name is Milos Sapic and I am a Electronics engineer with experience in Digital desigen, i have experience with : Xilinx ISE, Active-HDL, Quartus II 13.0, Nios II 13.0, Qsys you can see in my portfolio. Please choose me and you will not regret and you will be satisfied with the speed and quality of work. I look forward to possible cooperation. Best regards Milos

hello sir . I am an engineer in programmable electronics and i am worked with spartan 3e starter . I hope you give me the chance to work with you . I'm sorry for my English , i speak french

A proposal has not yet been provided

A proposal has not yet been provided

A proposal has not yet been provided

A proposal has not yet been provided

We have accomplished plenty of projects on FPGA. We have used both Verilog and VHDL depending upon the user's requirement. Please have look at my portfolio for details.