Convolution neural network

Hi, I am a senior digital design engineer, I have a broad knowledge of digital design in ASIC and FPGA using both VHDL and Verilog. I am using Vivado, ISE, and Quartise for FPGA, using DC, ICC, and prime-time for ASIC. I will provide you a professional report about your project with citation and scientific formatting. Please contact me to know more about your needs. Regards, moaaz.

Kindly please check https://www.freelancer.com/projects/python/Accelerating-Deep-Learning-Inference/reviews ------------- Dear sir, I am a digital design engineer expert in FPGA and ASIC design flows using Verilog and VHDL programming. Also, I am experienced with Vivado, ISE, Vivado IPs, SDK, Quartus, Design Compiler, IC Compiler and others. Please contact me to discuss more about this project. Kindest regards.

Hi I am researcher and circuit designer for FPGA/ASIC implementation. I holds Phd in circuit design for floating point used in CNN. If you give the entire specs, I can design your CNN at verilog/circuit level. Please come to chat for discussing more details

Hi client, I have experince in VLSI ,FPGA,I am working on diffrent tools like Xilinx,Vivado,MATLAB,ect..... I hope I will help in your project,so for more details you can freely contact to me. Thank you

Hi! we are a group of engineers with experience in digital design. can you give us a C/Matlab model or something like that in order to have a reference model?