verilog project

Dear sir I have more than 6 years experience in digital systems design using verilog, please message me so that we can discuss Best regards

A highly-skilled FPGA engineer with 6+ years experience and hundreds of FPGA/Verilog/VHDL projects using Xilinx/Altera FPGA Design Tools and Digital Logic Design using LogiSim/CEDAR. An FPGA/Verilog/VHDL Codementor and Founder of FPGA4student.

Hello! Please check my profile and reviews to know a bit about me and my work. It would be great if I could help you out.

Iexperienced implementing many mega projects using FPGAs using verilog/system verilog/VHDL experienced working with spartan 3, spartan6, zynq [zybo and zc-702 kit] Not Only on FPGA but to the ASIC Level also using tools like : Cadence - Leonardo - IC Calibre

Hi, I hope you are doing well and enjoying digital design. I believe implementing a design right form modeling until verifying it on an FPGA is always a very special experience. Throughout my 3+ years of experience in the field, I had the joy of designing and implementing a part of LTE's physical layer right from the Matlab model, through RTL coding, simulations, and back-end stages. I also built many other designs such as a MIPS processor design, Can satellite, and a UART transmitter and receiver. All my designs were verified successfully on either Xilinx's Spartan S6, S3, or Altera's Cyclone V FPGA. (You can refer to my portfolio) The project sounds really challenging which makes it much more appealing. I would love to hear your thoughts and requirements for the delivery as well. I wish you get the best out of this project. - Eslam

timely delivery the project is my motto have an experience on HDL'S more than 24 years experience on online/ research projects/ teaching on VLSI / DSP / Communication systems implementation & development

Hi, I am mechanical engineer , professional at Verilog. I strongly can help you to finish this project . So, contact me

Hi, Can you please throw some light as what kind of project you are looking for? I mean is there any specific IP or protocol or arch. that you have in mind? thanks mohit

I done many projects with ISRO and DRDO , so I think I can help you in best way.

Having more than 2+ years of hands-on experience in RTL/FPGA design using Verilog/VHDL hardware description languages. Hands-on experience with standard synthesis tools.

verilog , vhdl, i am ic design engineer Discuss deadlines. Tell the employer when you can have the project done by, and ask for more details if you do not know.